In RF digital cellular radio telephone systems, high stability frequency sources are necessary to obtain quality and reliable digital transmissions. The master clock signal used by digital cellular base-stations for synchronization is normally synthesized from an internal oscillator which is typically phase locked to a reference clock signal. In this configuration, the master clock signal directly tracks the reference clock signal, thus the characteristics of the master clock signal are dependent on the characteristics of the reference clock signal. If the reference clock signal is lost, the phase comparator section of the phase-locked loop produces a large phase error signal which is directly applied as a control signal to the internal oscillator. This large phase error signal causes the oscillator to drift off frequency and produce an incorrect master clock signal. Since the base-station relies on a stable master clock signal for accurate synchronization, the quality of communication from the base-station to corresponding equipment is seriously degraded.
Synchronization problems also arise when the reference clock signal is present but does not meet the system requirement for stability. If the reference clock signal drifts outside of the specified stability limits, typical phase-locked loops will produce a master clock signal that is likewise outside of the specified stability limits. If the system has no provision for monitoring the reference clock signal for drift, accurate synchronization will not be maintained and the quality of communication from the base-station to corresponding equipment will again be seriously degraded.
Thus, a need exists for a phase-locked loop system which maintains a master clock signal when the corresponding stable reference clock signal has been lost or has drifted out of specified stability limits while maintaining typical phase-locked loop characteristics.